What is crosstalk? And the causes and crosstalk solutions
What is crosstalk?
Cross talk is unwanted noise (electromagnetic coupling) generated between the wiring of PCBs.
Crosstalk is one of the most hidden and difficult problems that PCBs may encounter. The most difficult part is that crosstalk usually occurs in the final stage of a project and usually occurs in an intermittent or non reproducible manner. For engineers, it is important to address all the causes of crosstalk on PCBs as soon as possible.

PCB wiring design
Crosstalk can have adverse effects on clock signals, cycle and control signals, data transmission lines, and I/O. Generally speaking, crosstalk cannot be completely eliminated and can only be minimized as much as possible.
The mechanism of crosstalk
1. Coupling
Excessive voltage or current that affects one line can have a negative impact on another line, but there is no physical contact between these two lines. This coupling can occur whenever two networks run adjacent to each other for any significant length. When the signal is driven on one of the lines, the electric and magnetic fields it generates can cause unexpected signals to also appear on nearby lines, as shown in the following figure:

Crosstalk occurs when two or more adjacent traces are coupled together
2. Capacitive coupling
The following circuit diagram shows how to use circuit theory to simulate different types of crosstalk. In this figure, there are some parasitic capacitance between the two traces, which is due to the wide edge coupling between the traces. Because each trace is a conductor loop, each trace is like an inductor and has some parasitic inductance. Two parallel inductors have a certain mutual inductance, which defines the inductance coupling strength between the two lines.

The circuit diagram shows classic circuit models that describe different types of crosstalk in PCBs
Capacitive coupling does not only mean displaying the equivalent capacitance generated by the wiring edges, although it does contribute to mutual capacitance. Combining the local capacitance and wide edge capacitance of each trace to obtain the total mutual capacitance; They are all connected in series and coupled back to the ground plane.
When crosstalk occurs and is observed as a snapshot in the time domain, it is difficult to distinguish the contribution of capacitance and inductance to crosstalk.
3. 'Attacker' signal or routing switching
Crosstalk is a phenomenon that is particularly difficult to predict and control, unless it is simulated, as there is almost no way to intuitively know how much crosstalk voltage and current will be generated due to a given coupling.
In terms of crosstalk, the "attacker" signal or trace switches and causes crosstalk. The 'victim' signal or trajectory responds by generating an unexpected signal. The effect is essentially three-dimensional. The victim can be adjacent on the same layer, or above or below the attacker (as shown in the figure below).

The victim network can be located above, below, or near the attacker's network
4. Forward and backward crosstalk
In fact, there are two coupled signals added to the victim network: a forward signal and a backward signal. The "forward" pulse propagates together with the interference signal, while the "backward" pulse returns from the interference signal. The crosstalk at the affected far end is called "far end crosstalk" or FEXT, and the coupling voltage at the near end is called "near end crosstalk" (NEXT). The following figure shows forward and backward crosstalk.

Schematic diagram of forward and backward crosstalk on the affected trace
Causes for crosstalk
1. Capacitive and inductive coupling
Capacitive coupling is due to parasitic capacitance, while inductive coupling is due to mutual inductance.
2. Difference in propagation speed
Differences in propagation speed, possible crosstalk
3. PCB through-hole
PCB vias with short cut lines will generate reflections, resulting in ringing and crosstalk.
4. Increased data rate
As the data rate increases, the rise time also increases. According to Faraday's law, as the rise time increases, crosstalk also increases.
5. Plate size
As the size of the PCB board increases, the length of the wiring will also increase, just like an antenna.
Tips for reducing crosstalk in PCB design
1. Check critical networks close to the I/O network
It is important to check the wiring of critical networks related to I/O lines, as noise can easily leave or enter the circuit board through these I/O lines (as shown in the figure below) and connect the PCB to or outside the circuit board. The external world and other PCBs or modules in the system.

Schematic diagram of scenarios where critical networks and I/O networks are wired close to each other
Any noise entering the circuit board through I/O lines may be coupled to the critical network carrying important data/clock signals, which is basically the anti-interference aspect of the PCB (as shown in the left figure). In a similar way, any high-speed signal transmitted by a critical network can be coupled to the I/O network, ultimately reaching the external world through I/O cables coming out of the board and entering other modules in the system. In principle, this will be the emission aspect of the PCB (as shown on the right in the figure below).

Potential EMI/EMC issues caused by proximity between critical networks and I/O networks
2. Minimum width between wiring bays
When defining PCB layout, some rules can be set in the CAD tools used, such as the minimum distance between two lines and the minimum distance between each line and the components present on the board. You can also set different distance values related to the specific network table or the area in which the network table will be wired.
PCB design software applications typically include functions to specify the width and distance of differential signal pairs, or to lay out a network table on which PCB layers and the preferred direction for wiring.

PCB wiring width
3. Keep the routing of adjacent layers perpendicular
The configuration of the PCB layer should ensure that signals passing through adjacent layers have mutually perpendicular directions, absolutely avoiding their parallel routing. Some people also say that if the first floor runs from north to south, then the next floor should run from east to west. This simple preventive measure can help you minimize the impact of wide edge coupling.
As shown in the following figure: the left side is the layout to avoid, and the right side is the layout to apply.

4. Using a ground plane
It is best to insert a ground plane (or a power layer) between two adjacent signal layers to further reduce the possibility of wide edge coupling.
This solution has a dual advantage of increasing the distance between layers and providing a better ground return path for the signal layer. In the figure below, we can see a classic four layer PCB, divided into two signal layers (external), an internal layer for the ground plane (0V), and an internal layer for the power supply.

Example of multi-layer PCB
5. Utilizing a grounded return path
Although this is somewhat contradictory to the previous statement, the alternative technology that can be used to reduce crosstalk is precisely to utilize the parallelism between the wiring and couple the ground return path with high-frequency signals.
In fact, due to the fact that the ground return path has the same amplitude but opposite direction relative to the signal, the impact can be eliminated, thereby reducing crosstalk.
6. Using differential signals
Another method to ensure signal integrity and minimize the impact of crosstalk is to use differential signals, where two signal lines with the same amplitude but opposite polarity form a single high-speed signal. Due to the fact that the signal is obtained as the difference in voltage between the two signal lines during reception, and the impact of electromagnetic noise on the two lines is the same.
Therefore, even with significant external noise, the signal can maintain a high degree of integrity. The suggestion is to maintain the maximum distance possible between the differential signal pair and other PCB wiring. The rule of thumb is to choose a distance that is at least three times the width of the track.

PCB diagram
7. Reduce the width of parallel wiring
In all cases where parallel wiring cannot be avoided, it is necessary to ensure that their width is as short as possible to reduce coupling.

PCB with wire taken away
8. Isolate high-frequency signals from other wiring
High frequency signals (such as clocks) must be kept as far away from the wiring carrying other signals as possible. Even in this case, a rule of thumb can be applied to choose a minimum distance equal to three times the width of the wiring.

Crosstalk affects signal transmission
9. Minimize the critical tracking length of exposure as much as possible
On high-speed PCBs with shorter wavelengths (>100MHz), the electrical length of any critical network (see left in the figure below) is sufficient to make it an efficient radiator, especially when exposed to the top or bottom layers, where this unwanted radiation can be coupled to any adjacent traces, and even to cables present in components near the traces.
It is recommended to bury the critical network between the solid planes on the inner layer of the PCB, as shown on the right in the following figure. This helps to control the field in the wiring and avoid any unintentional coupling in the form of crosstalk or EMI. If exposing critical networks is inevitable, please shorten the length of the exposed portion as much as possible. This is because the shorter lengths of exposed traces will have a smaller radiation trend, as if their electrical dimensions are very small, they will be inefficient antennas.

Illustration of exposing or burying critical networks between solid planes
10. Isolated asynchronous signal
Asynchronous signals, such as reset or interrupt lines, should be routed as far away from high-frequency signals as possible. Asynchronous signals are often placed near signals near power lines or control switches, as these signals are only used for certain stages of circuit operation rather than continuous use.
11. Back drilling through hole
Short cut through holes can reduce signal integrity and therefore increase crosstalk, which can be reduced by implementing back drilling.

PCB with via holes
12. Select differential pair wiring
The tightly coupled difference distribution line eliminates crosstalk because the noise from the interference source is evenly coupled to the two branches of the difference pair, resulting in common mode noise. Differential pair suppression helps to reduce common mode noise caused by crosstalk.
In theory, the difference is applied to signals with equal carrying capacity but opposite polarity, as the EMI generated by this signal can be offset or ignored. However, this is only effective when the wiring lengths in the alignment are equal and as symmetrically close to each other as possible.
Violating any of these can result in common mode noise and EMI issues, especially for differential networks carrying high-frequency critical signals, as EMI increases the frequency of the signal being carried.
The following figure shows several examples of correct/incorrect methods for routing critical differential pairs between IC packaging and exit points (connectors) on circuit boards.

Return current path in the presence of reference plane splitting
Key Differential Network Matching: Simulation and Relationship with Actual Test Requirements
In the PCB example shown in the figure below, there is a simple differential pair wiring on the PCB in two different ways: symmetrical and asymmetric. In both cases, one end is excited by a differential voltage source and the other end is terminated by the load.

Example of differential pair wiring on PCB
13. Using protective wiring
The protective wiring is used to control capacitive crosstalk between transmission lines. But it needs to be used with caution, as using protective wiring can affect it.
Articles you may also like
Design of High Current H-Bridge Motor Drive Circuit
The working principle, key parameters, and selection of TVS
Understanding NAND Gate: The Universal Logic Gate in Digital Circuits
Gas Discharge Tube Symbols, Characteristics and Structure
-
texas-instruments
200mA LDO, 3.3V fixed output, low noise, 2µA IQ, high PSRR in SOT-23-5.
